Post Graduate Development Chair

Mark Smyth is presently an Analog design consultant to MCCI based at the Tyndall Institute, Cork.

Previously Mark was Systems Architect at Xilinx responsible for the design of Wireline Transceiver products for the Serdes Group (’12-’15). Mark lead a team at Cork that designed 16Gbs Transceivers on 20nm and 16nm process nodes for Xilinx FPGA products.

Prior to Xilinx Mark was Principal Engineer at Irish fabless semiconductor start up Redmere where he was involved in the design of high performance Serdes for HDMI active cables. He previously held senior analog design positions at Ceva and Freescale Cork. Mark holds multiple US Patents. His research interests are primarily in the areas of high speed clocking and data recovery,

Mark received a BE in Electrical Engineering from University College Cork in 1995, and an MEngSc from the Tyndall Institute in 1998.