Education and Outreach Chair

Peng Lim joins Xilinx as Analog Mixed Signal (AMS) Program Manager since 2011, responsible for high speed converters development activities. Prior to joining Xilinx, Peng was a senior staff engineer with S3 Group for nearly 20-years involved in Sigma-Delta ADC design, Project Manager Test Chip Architect, Analog IP Quality Manager, 
Foundry Manager and Technical Sales Support for Asia Pacific.

Peng graduated from Trinity College Dublin with BA, BAI and MSc Engineering in 1990 and 1992.

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